Registers 8051 family
name description adress
--- ----------- ------
ACC acummulator E0
B B register F0
DPTR datapointer
DPH datapointer highbyte 83
DPL datapointer lowbyte 82
IE interrupt enable A8
IP interrupt priority B8
P0 port 0 80
P1 port 1 90
P2 port 2 A0
P3 port 3 B0
PCON power control 87
PSW program status word D0
SBUF serial databuffer 99
SCON serial controller 98
SP stack pointer 81
TCON timer control 88
TH0 timer high 0 8C
TH1 timer high 1 8D
TL0 timer low 0 8A
TL1 timer low 1 8B
TMOD timer mode 89
bit description symbol
--- ----------- ------
B7 reserved
B6 reserved
B5 reserved
B4 priority of serial port interrupt PS
B3 priority of timer 1 interrupt PT1
B2 priority of external interrupt 1 PX1
B1 priority of timer 0 interrupt PT0
B0 priority of external interrupt 0 PX0
bit description symbol
--- ----------- ------
B7 enable all interrupts EA
B6 reserved
B5 reserved
B4 enable serial port interrupt ES
B3 enable timer 1 interrupt ET1
B2 enable external interrupt 1 EX1
B1 enable timer 0 interrupt ET0
B0 enable external interrupt 0 EX0
bit description symbol
--- ----------- ------
B7 carry flag CY
B6 auxiliary carry flag AC
B5 general purpose status flag F0
B4 register bank select bit 1 RS1
B3 register bank select bit 0 RS0
B2 overflow flag OV
B1 user definable
B0 parity of accumulator P
bit description symbol
--- ----------- ------
B7 serial port mode SM0
B6 serial port mode SM1
B5 enable multiprocessorfeature in SM2
modes 2 & 3, RI will not be activated
if RB8=0 & SM2=1
in mode 1 RI will not be activated if
stop bit was invalid & SM2=1
SM2 should be 0 in mode 0
B4 enable reception REN
B3 in modes 2&3 9-th bit tx TB8
B2 in modes 2&3 9-th bit rx RB8
mode1 ; if SM2=0 RB8=stop bit value
mode0 ; not used
B1 tx interrupt flag TI
mode0 : set by 8-th bit time
other modes : set by beginning of
stop bit
B0 rx interrupt flag RI
Modes descr. Baudrate
00 shift register f_osc/1201
8-bit UART variable10
9-bit UART f_osc/64 of f_osc/3211
9-bit UART variable
bit description symbol
--- ----------- ------
B7 timer 1 overflow flag TF1
B6 timer 1 on/off control TR1
B5 timer 0 overflow flag TF0
B4 timer 0 on/off control TR0
B3 interrupt 1 edge flag IE1
B2 interrupt 1 triggercontrol bit IT1
B1 interrupt 0 edge flag IE0
B0 interrupt 0 triggercontrol bit IT0
bit description symbol
--- ----------- ------
B7 0 = t/c 1 enabled via TR1 GATE
1 = t/c enabled via INT1 + TR1
B6 timer = 0, counter = 1 T/C
B5 operating modes t/c 1 M1
B4 operating modes t/c 1 M0
B3 idem for t/c 0B2 idem for t/c 0
B1 idem for t/c 0B0 idem for t/c 0
Modes
00 TLx serves as 5-bit prescaler
01 16-bit t/c THx & TLx are cascaded
10 8-bit reloader, valTHx is loaded in TLx when TLx overflows
11 TL0 is an 8-bit t/c controlled by Timer 0 controlbits
TH0 is an 8-bit t/c controlled by Timer 1 controlbits
t/c 1 stopped
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